With the advancement of micro fabrication techniques, probes for testing electronic circuitry may be increasingly mass fabricated at ever decreasing scale and increasing complexity. In an exemplary multilayer deposition process, a large number of microstructures are simultaneously grown on a substrate by the use of multiple masks and sacrificial fill structures to generate multistep structures substantially free of shape constraints. In the field of probe apparatus fabrication, this multilayer deposition process is used at the time of this invention, to fabricate the probes of a probe apparatus simultaneously on the substrate with a spacing that corresponds to the operational pitch of the finally assembled probes. Unfortunately, probe apparatus are highly individualized devices with many differing pitches of the assembled probes, which have to comply with the particularities of the tested circuitry and/or tested devices. To the contrary, the multilayer deposition process is very cost intensive due to the large number of deposition processes that need to be individually prepared and require also a large number of expensive masks. Therefore, there exists a need for probe designs and probe assembly techniques that utilize the free shaping capabilities of multilayer deposition processes without limitation of the affiliated fabrication spacing constrain. The present invention addresses this need.